Intern - Next-Generation HBM Architecture
Core
Architecting next-generation High Bandwidth Memory (HBM) solutions for AI and high-performance computing workloads.
Role type
Intern, Memory Systems Architect
Builds
Future HBM products for AI, HPC, and data center applications
Domain
Semiconductor / Memory Systems / Computer Architecture
Deliverable
production ML models
Required skills
Computer architecture, Memory systems, VLSI, Python, C++, SystemVerilog, Hardware system design, Technical specifications analysis, AI coding assistants
Preferred skills
Memory simulation (Ramulator, DRAMSim, gem5), HBM/DDR/LPDDR/GDDR architectures, Memory reliability (ECC, RAS), RTL development, AI tooling for engineering workflows, AI accelerator architectures
Responsibilities
Research and evaluate next-generation HBM architecture and microarchitecture features, Develop and enhance performance models and simulators, Analyze workload behavior and simulation results, Utilize AI-assisted engineering tools, Collaborate with cross-functional engineering teams
Seniority
Intern
