FY27 Intern - Formal Verification Engineering Internship - 6 months, Cambridge
Core
Develop formal verification skills and build end-to-end formal sign-off environments for Qualcomm CPU components.
Role type
Formal Verification Engineering Intern
Builds
End-to-end formal sign-off environments for CPU components
Domain
Semiconductor / CPU Design
Required skills
Formal methods, Verilog HDL, Computer architecture, Test plan development, Design intent analysis
Responsibilities
Work with design team to understand design intent and bring up verification plans and schedules; Define formal verification architecture and develop test plans.
Seniority
Intern
