Staff Emulation Build Quality, Performance & Debug Engineer
Core
Improving the efficiency, scalability, quality, and reliability of Qualcomm's pre-silicon emulation platforms through build performance optimization, root-cause analysis, and methodology development.
Role type
Staff IC emulation build quality and performance engineer
Builds
Pre-silicon emulation platforms (FPGA-based) for SoC designs
Domain
Semiconductor hardware design (ASIC/SoC) and FPGA emulation
Required skills
Emulation platforms (FPGA Prototyping, Veloce, Palladium), Build performance analysis, System debug (Waveform generation, Content Debug), SoC architectures (CPU/DSP, Interconnects, NoC, PMIC), Verilog/SystemVerilog, C programming, Python/TCL scripting, FPGA expertise (Xilinx/Intel, timing closure), Root-cause analysis, Cross-functional collaboration, Technical leadership
Preferred skills
7+ years in emulation/silicon environments, Design of global methodologies for emulation build generation, Automation of build processes, Mentoring junior engineers, Pre-silicon bring-up of FPGA hardware/software, Debug tools (JTAG, kernel debuggers), Validation of digital circuits, Metrics development for build quality
Technologies
Veloce, Palladium, Xilinx FPGAs, Intel FPGAs, SystemVerilog, C, Python, TCL, JTAG, Waveform generation tools
Responsibilities
Drive emulation build performance improvements through analysis, optimization, and automation; Lead complex debug efforts involving emulation infrastructure, hardware design, and software; Develop methodologies to improve build quality and debug efficiency; Perform root-cause analysis of build failures, timing issues, and functional failures; Mentor junior engineers and guide technical initiatives; Collaborate with architecture, design, verification, and software teams.
Seniority
Staff, hands-on IC with technical leadership
