CareerPlan

CPU Post-Silicon Performance Engineer

Santa Clara, California, United States of AmericaFull-time$148k–$222k2026-10-07 → 2026-11-10

Core

Prepare for and support the bring-up of every SoC using Custom CPUs from first silicon through to productization, focusing on performance validation and debugging.

Role type

Senior IC CPU Post-Silicon Performance Engineer

Builds

Custom CPU-based SoCs for mobile and other markets

Domain

Semiconductor / CPU Engineering

Required skills

Silicon validation and bring-up, Assembly/C/C++ embedded firmware, Software tool chain (assemblers, compilers, Makefiles), Debugging silicon failures, Test content and strategy development, Emulation/FPGA debugging, Debug feature architecture

Preferred skills

Server performance analysis (SPEC INT/Float/DC), CPU/L2/LLC/NoC/memory/DDR performance analysis, Emulation-based performance validation, Thermal behavior and sustained-performance analysis, DCVS/frequency/power/thermal-limit correlation, Benchmark analysis and performance-regression debug, Correlation between emulation/reference design/silicon

Technologies

FPGA, Emulation platforms, SPEC INT, SPEC Float, DC Perf workloads, C/C++ Assemblers, Compilers, Makefiles

Responsibilities

Develop CPU bring up and validation test plans, Triage and debug failures on Silicon, Work with SOC bring up and software teams to plan CPU bring up, Reproduce silicon fails on emulators and FPGAs, Suggest and architect new debug features to improve future CPU bringups

Seniority

Senior, hands-on IC