Performance Modeling Engineer Processor, AI Accelerator, and SoC Architecture- Sr.Staff
Core
Develop high-fidelity performance models for next-generation processors, AI accelerators, and SoC platforms to guide architectural tradeoffs and design decisions.
Role type
Sr. Staff Performance Modeling Engineer (Processor/AI Accelerator/SoC)
Builds
High-fidelity transaction-level and analytical performance models for processors, memory hierarchies, interconnects, and accelerators
Domain
Semiconductor / Computer Architecture / High-Performance Computing
Deliverable
production ML models
Required skills
Transaction-level modeling (TLM/SystemC), Analytical performance modeling, Architectural simulators, Cache hierarchy design, Coherent interconnects, Memory subsystems, DMA engines, SMP systems, Branch prediction analysis, Hardware prefetching, Speculative execution analysis, Load/store architecture, Cache coherence protocols, Memory consistency models, C++, Python
Preferred skills
AI accelerator modeling, Network-on-Chip (NoC) architectures, Memory controllers, DDR/HBM memory systems
Technologies
SystemC, C++, Python, ARM CHI, ACE, MESI/MOESI
Responsibilities
Develop and maintain transaction-level and analytical performance models for processors, memory hierarchies, interconnects, and accelerators. Evaluate architectural tradeoffs involving performance, power, area, latency, bandwidth, and scalability. Analyze workload behavior and identify system bottlenecks through simulation and modeling. Drive architectural studies for next-generation multicore and cache-coherent systems. Model and validate the behavior of multithreaded and multiprocessor workloads. Collaborate with hardware and software teams to correlate performance models with RTL simulations, emulation results, and silicon data. Present architectural recommendations and performance insights to engineering leadership.
