WRD(RTL ) Design - Staff/Manager
Core
Designing Wi-Fi PHY IPs and signal processing modules for Qualcomm's Wi-Fi chips, covering the full lifecycle from spec understanding to RTL coding, QA, and release.
Role type
Staff/Manager Digital Design Engineer (Wi-Fi PHY)
Builds
Wi-Fi PHY IPs and signal processing modules for upcoming Wi-Fi standards
Domain
Semiconductors / Hardware Engineering / Wireless Communications
Required skills
RTL coding (Verilog, System-Verilog), Micro-architecture design, Signal processing concepts/algorithms, RTL QA flows (PLDRC, CDC, CLP), Scripting (Perl, Tcl), Debugging
Preferred skills
HLS experience, Circuit design (digital, analog, RF), Schematic capture and simulation, Hardware measurement instruments, Technical leadership
Technologies
Verilog, System-Verilog, Perl, Tcl, FPGA, DSP
Responsibilities
Design micro-architecture and code RTL for Wi-Fi PHY IPs, Collaborate with verification teams on test plans and debugging, Develop timing constraints for synthesis, Participate in requirements discussions with systems teams
Seniority
Staff/Manager, hands-on IC with significant decision-making and team guidance
