Video Codec Digital Circuit Design Engineer
Core
Architect, design, and optimize hardware blocks for video encoding and decoding, translating video standard requirements into efficient micro architectures.
Role type
Senior IC digital circuit design engineer (video codec)
Builds
Video codec IP blocks for SoC subsystems
Domain
Semiconductor / Video Compression (H.264, H.265, AV1, VVC)
Required skills
Hardware architecture, RTL design, C/C++/SystemC modeling, Algorithm-to-hardware decomposition, SoC integration, Timing optimization, Power planning
Preferred skills
Knowledge of video standards (H.264/AVC, H.265/HEVC, AV1, VVC), Physical design collaboration, Post-silicon validation
Technologies
SystemC, C/C++, RTL, NoC, SoC
Responsibilities
Architect and optimize hardware blocks for motion estimation, transform, entropy coding, and rate control; Partner with systems teams to evaluate throughput, latency, and quality metrics; Collaborate with verification teams to define test plans and debug infrastructure; Drive integration of codec IP into SoC subsystems; Work with physical design teams to meet PPA targets; Support post silicon bring up and validation.
Seniority
Senior, hands-on IC
