Staff CPU/NPU Architecture RTL Design Engineer
Core
Design high-performance, energy-efficient CPU and AI processor IP blocks for Snapdragon processors and Hexagon NPU inference engines.
Role type
Staff CPU/NPU Architecture RTL Design Engineer
Builds
CPU and AI processor IP blocks for Snapdragon and Hexagon NPU
Domain
Semiconductor / CPU & NPU Architecture
Deliverable
production ML models
Required skills
RTL design, CPU/AI micro-architecture, debug architecture, power-management, circuit design, Computer Arithmetic, Instruction fetch/scheduling/register renaming, Fixed/Floating-Point design, Matrix Multiply engines, Vector Extensions, Memory sub-systems (caches, atomics, coherence), Branch prediction/out-of-order dispatch, Multi-processor systems, RISC-V, PPA optimization
Preferred skills
ASIC design, verification, validation, integration
Technologies
RISC-V
Responsibilities
Develop RTL for high-performance CPU/AI processors; Design micro-architecture and architecture; Optimize for Power, Performance, and Area (PPA); Implement CPU sub-system logic design
Seniority
Staff, hands-on IC
