【Taiwan】APAC Digital SOC Test Engineer-Integration/Structural/ATPG/SCAN/MBIST
Core
Develop, bring up, and validate SoC and Chiplet test programs across NPI and high-volume manufacturing stages, focusing on structural test content (ATPG, MBIST, Integration) and debugging test issues.
Role type
Senior IC Digital Test Engineer (SoC/Chiplet)
Builds
Test solutions for Qualcomm Silicon on Chip (SOC) products
Domain
Semiconductor / Hardware Engineering / Digital Test
Required skills
Structural test (ATPG, TDF, MBIST), SoC/Chiplet test program development, Test platform operation (Advantest 93K, Teradyne UltraFLEX/iFlex), C++/Python/VB/Java scripting, Test/yield data analysis (O+, Data Power, Exensio), Cross-functional collaboration
Preferred skills
Chiplet test strategy definition (D2D interfaces), Advanced technology node test bring-up, AI-assisted test automation, Version control (Git/SVN), Issue tracking (JIRA), Mentoring
Technologies
Advantest 93K, Teradyne UltraFLEX, iFlex, O+, Data Power, Exensio, JMP, Git, SVN, JIRA, C++, Python, VB, Java
Responsibilities
Develop and validate SoC/Chiplet test programs; Debug and resolve coverage, yield, and test escape issues; Optimize test time and flow; Analyze test/yield data for root cause analysis; Collaborate with DFT, Design, Yield, and Manufacturing teams.
Seniority
Senior, hands-on IC
