ASIC Engineer
Core
Architect, develop, and deploy Automated Test Equipment (ATE) solutions for complex ASICs and SoCs, owning the lifecycle from pre-silicon DFT to high-volume manufacturing release.
Role type
Senior IC ASIC Test Development Engineer
Builds
Automated Test Equipment (ATE) test programs and silicon bring-up solutions for networking processors and multi-die packages
Domain
Semiconductor testing / ASIC design / High-speed I/O
Required skills
ATE test program development, C/C++/Python/Perl scripting, DFT architecture (ATPG, BIST, JTAG), high-speed SerDes testing, mixed-signal testing, yield optimization, lab equipment debugging
Preferred skills
Advanced packaging technologies (2.5D/3D, chiplets), multi-die package validation, OSAT partner management
Technologies
Advantest V93000 (SmarTest), Oscilloscopes, BERTs, Logic analyzers
Responsibilities
Architect and debug complex ATE test programs for wafer sort and final test; Lead first-silicon ATE bring-up and characterization; Collaborate with DFT teams to define testability requirements and simulate test vectors; Drive Test Time Reduction (TTR) and yield optimization initiatives; Lead transfer of test programs to OSAT partners and resolve manufacturing issues; Mentor junior engineers and drive continuous improvement in test methodologies
Seniority
Senior, hands-on IC
