SoC Power Validation Engineer
Core
Ensure SoC quality by using post-silicon validation techniques to verify CPU/GPU/DDR/NOC power at core and system level.
Role type
SoC Power Validation Engineer
Builds
SoC silicon chips (CPU, GPU, DDR, NOC)
Domain
Semiconductor / SoC Design
Required skills
SoC system architecture, power trees, low-power techniques, PVT testing, regression testing, Python scripting, JTAG debugging, kernel debugging, Vmin/Fmax measurements, lab equipment usage (logic analyzers, oscilloscopes)
Preferred skills
Mobile chip architecture, RTL understanding, transistor power fundamentals, silicon parametric testing, prompt engineering
Technologies
Python, C, JTAG, Lauterbach Trace32, Logic Analyzers, Oscilloscopes
Responsibilities
Perform Pre-Si and Post-Si Power, thermal & performance correlation, debug, and analysis at the system level; Execute regression and PVT testing across different parts, lots, and wafers; Collaborate with architects, designers, and verification engineers to define and execute comprehensive validation plans; Document observations and propose solutions to optimize hardware and software for low power consumption; Debug low-level software and hardware issues; Conduct Vmin/Fmax measurements and collect data for performance characterization; Automate validation flows, data collection, and analysis using Python or similar scripting languages.
Seniority
Mid-level IC Engineer
