CareerPlan

CPU RTL Design Engineer

Hsinchu City, TaiwanFull-time2026-03-17 → 2026-11-10

Core

Development of ARM/RISC-V architecture based complex CPU subsystems, including feature enhancement, micro-architecture, and RTL development.

Role type

Senior IC CPU RTL Design Engineer

Builds

CPU sub-systems integrated with other IPs for consumer devices

Domain

Semiconductor / CPU Design

Required skills

Computer architecture, ASIC design flow, DV methodologies, Simulation tools, Verdi, Linting, Static timing analysis, CDC, DFT, MBIST

Preferred skills

ARM/MIPS/x86 CPU subsystem micro-architecture, ARM AMBA bus specifications, ARM or RISC-V Architecture, L1/L2/L3 caching schemes

Technologies

ARM, RISC-V, AMBA (CHI/ACE/AXI/AHB/APB), Verdi, Linting

Responsibilities

CPU sub-system feature enhancement and micro-architecture design, RTL development, Integration of CPU and IPs, Design delivery process ownership, Enablement of verification and constraint reviews, Post-silicon bring up and debug