CareerPlan

Graphics ASICS Hardware Design Engineer

San Diego, California, United States of AmericaFull-time2026-09-17 → 2026-11-10

Core

Micro-architect and design RTL for blocks and modules of Adreno GPU architecture across shader processing, graphics pipelines, memory subsystem and interconnect, and power and system level design.

Role type

Senior IC hardware micro-architect and RTL designer

Builds

Integrated GPUs for Snapdragon compute platforms (smartphones, Windows PCs, Chromebooks, VR/AR, automotive)

Domain

Semiconductors / GPU Architecture

Required skills

Verilog/SystemVerilog design, Synopsys synthesis, low power design, test plan development, coverage-based design verification, Computer Architecture, Computer Arithmetic, C/C++/Python programming

Preferred skills

GPU/CPU/DSP/ML/cache/controller/video/display/camera ASIC design experience, Graphics API exposure (OpenGL, Vulkan, Direct3D)

Technologies

Verilog, SystemVerilog, Synopsys, OpenGL, Vulkan, Direct3D

Responsibilities

Micro-architect and design RTL for blocks and modules of Adreno GPU architecture, Identify advanced ways to optimize hardware design for better performance, power, and cost, Evaluate the hardware feasibilities of complex algorithms and requirements, Develop micro architecture and specification of the new generation design, Provide essential verification and debugging activities for the corresponding design throughout the entire project cycles, Troubleshoot silicon issues with products relevant to the corresponding design

Seniority

Mid to Senior level (3-20 years experience)