Intern - Design Engineer, HBM
Core
Design, analyze, and optimize digital, analog, and memory circuits for High Bandwidth Memory (HBM) products supporting AI and HPC.
Role type
Intern, Design Engineer (HBM Memory)
Builds
High-performance DRAM solutions for AI, HPC, and data-centric applications
Domain
Semiconductor / Memory Technology
Deliverable
production ML models
Required skills
CMOS circuit design, semiconductor device physics, schematic entry, circuit simulation (FineSim, HSPICE), Verilog modeling, power network analysis, scripting (Python, TCL, Perl)
Preferred skills
DRAM architecture, SoC/IO interfaces, AI-Assisted tools, Generative AI
Technologies
FineSim, HSPICE, Verilog, Python, TCL, Perl
Responsibilities
Design and optimize memory, logic, and analog circuits; perform circuit verification and parasitic modeling; collaborate with layout and verification teams; partner with Product Engineering and Test teams; leverage AI-Assisted tools for design efficiency.
Seniority
Intern
