CareerPlanSign in

Staff DRAM Design Engineer

Boise, Idaho, United States of America💼 Full-time🗓 2026-07-28 → 2026-09-25

Core

Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic to shape memory architectures and circuit innovations.

Role type

Staff DRAM Design Engineer (IC Design)

Builds

High-performance, manufacturable memory solutions (DRAM)

Domain

Semiconductor / Memory / Analog & Digital Circuit Design

Deliverable

production ML models | product features

Required skills

Analog and digital circuit fundamentals, circuit simulation (SPICE, Verilog), CMOS behavior, timing analysis, performance optimization, debugging, design for manufacturability (DFM), layout parasitics integration

Preferred skills

DRAM array design, sense amplifier design, DFT/DFM concepts, advanced process nodes, AI tools for engineering workflows

Responsibilities

Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic; Perform and analyze circuit simulations using tools such as SPICE and Verilog; Evaluate architectural trade-offs impacting power, performance, and die size; Integrate layout parasitics into simulations and drive design for manufacturability; Define validation strategies including test chip development and silicon bring-up

Seniority

Staff, hands-on IC design with strategic influence

Sourced via eightfold · Listed on CareerPlan, which tracks 70,000+ jobs from 20+ sources.