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Staff Design Engineer

San Jose, California, United States of America💼 Full-time💰 $145,000–$145,000🗓 2026-07-01 → 2026-09-25

Core

Crafting and analyzing digital circuits for NAND memory product development, optimizing performance, quality, and reliability.

Role type

Staff Design Engineer (Digital Circuits)

Builds

NAND memory products

Domain

Semiconductor / Memory Storage

Deliverable

production ML models | product features

Required skills

Digital circuit design, RTL design, Gate-level verification, Schematic design, Architecture specification, Design simulation, Silicon validation

Preferred skills

Technical leadership, Project management, Non-volatile memory technologies, Building architecture guidelines, Documentation and training

Technologies

Verilog, RTL, Synthesized netlist, Post layout simulation

Responsibilities

Interpret device and system specifications to deliver required functionalities; Participate in the conception and development of new circuits; Define and design composition architecture specifications for new features; Support the creation of schematics and/or RTL blocks; Define best known design and verification practices; Perform RTL and synthesized netlist verification at block, subsystem, and full chip level; Facilitate netlist bring up to achieve basic functionality; Design verification plans for new and existing features; Collaborate with Product Engineering on validation plans and review silicon results; Assist in silicon design validation, reticle experiments, qualification, and tape-out revisions.

Seniority

Staff, hands-on IC with leadership

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