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EUV Lithography Process Development Engineer- TPG

Boise, Idaho, United States of AmericaFull-time2026-04-24 → 2026-10-09

Core

Evaluate and develop advanced semiconductor patterning technologies (EUV, High NA EUV, 193nm immersion) for next-generation memory products.

Role type

Senior IC lithography process development engineer

Builds

Next-generation memory solutions and advanced lithography processes

Domain

Semiconductor manufacturing / Photolithography

Required skills

EUV lithography process development, 193nm immersion multiple patterning (LELE, SAQP), photolithography optics and patterning fundamentals, process integration, defect inspection methodologies, mask engineering collaboration

Preferred skills

High NA EUV pathfinding experience, photolithography simulation software (PROLITH, S-Litho), statistical analysis and DOE, JMP/Python data analysis, AI-assisted analytics

Technologies

EUV, High NA EUV, 193nm immersion, PROLITH, S-Litho, JMP, Python

Responsibilities

Lead pathfinding activities for advanced lithography technologies, develop and optimize EUV lithography processes, collaborate with process integration and manufacturing teams, support development of inspection methodologies and defect reduction strategies, travel to support High NA EUV development activities (via careerplan.io/jobs/40272481-euv-lithography-process-development-engineer-tpg-at-micron)

Seniority

Senior, hands-on IC