Principal Analog Design Engineer
Core
Designing highly sophisticated CMOS LR SERDES, D2D, and common Analog IPs for Marvell's central engineering team.
Role type
Principal Analog IC Designer
Builds
Analog IPs for Automotive, Storage, Security, and Networking architectures
Domain
Semiconductor / High-speed Analog IC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
CMOS LR SERDES design, D2D IP, PLL/DLL design, ADC design, regulator design, amplifier design, TX/RX design, CDR design, SPICE simulation, Spectre simulation, MATLAB modeling, Virtuoso layout, ADE verification, post layout extraction, signal integrity analysis, noise reduction, Multi-GHz clock generation, FinFet layout, system-level pre-tape out validation, lab chip bring-up, debugging
Preferred skills
UCIe interface, DDR5/LPDDR5, GDDR6/LPDDR6, HBM, Master's or PhD in Electrical Engineering
Technologies
Virtuoso, Spectre, ADE, SPICE, MATLAB
Responsibilities
Lead a team of analog design engineers, interface with layout and verification teams, manage delivery of analog IP from concept to production, perform architectural investigations and circuit implementation, conduct design verification using industry standard tools
Seniority
Principal, hands-on IC with team leadership
