MTS Digital Design Engineer
Core
Lead digital IC design architecture and RTL implementation for power management chips including multiphase controllers, smart power FETs, and DC-DC converters.
Role type
Senior IC design engineer (digital architecture & RTL)
Builds
Power management ICs for consumer, industrial, and automotive applications
Domain
Semiconductor / Power Electronics
Deliverable
production ML models | product features
Required skills
Digital RTL design, ASIC synthesis, timing analysis, System Verilog, Python/TCL/Perl scripting, FPGA/Emulation bring-up, microprocessor interconnects, power topology architecture
Preferred skills
Low power design, behavioral coding, IP quality control, post-silicon validation
Technologies
Verilog, TCL, Perl, Python, XML, SOCV, FPGA, UPF
Responsibilities
Lead digital IC design team with product ownership from definition to release, drive architecture to micro-architecture to RTL implementation, support pre-silicon bring-up on SOCV/Emulation/FPGA, own technical outcome of design and verification, define product strategy and roadmap, lead customer and production issue resolution
Seniority
Senior, hands-on IC design with team leadership