Design Verification Engineer Lead
Core
Lead verification of IP, Subsystem, and System-on-Chip designs for TI's RADAR product line, ensuring quality and reliability for automotive and industrial applications.
Role type
Design Verification Engineer Lead
Builds
Scalable RADAR portfolio using DSP and ARM multi-cores for ADAS, body & Chassis, and Industrial space
Domain
Automotive and Industrial electronics, Radar systems
Deliverable
production ML models | product features
Required skills
C-based SoC design verification, UVM/SystemVerilog, Specman, GLS/PAGLS/CPF/UPF, post-silicon verification, AXI/AHB/APB/CAN/Ethernet/I2C/SPI/UART/CSI protocols, ARM/DSP multi-processor systems, power-aware simulations, digital design fundamentals, bus protocols, debugging Verilog/VHDL, Cadence tools (Xcelium/vManager/Formal JG), functional safety, cybersecurity processes
Preferred skills
firmware verification, scripting (Perl/Python/AI/ML), AMS, CDC digital verification, formal verification
Responsibilities
Own IP/subsystem/SOC DV from spec definition to post silicon verification and customer issue resolution; define verification strategy and plan with 100% spec to regression traceability; develop and enhance DV environments including TBs, checkers, and coverage monitors; collaborate with cross-functional teams (Architecture, RTL, PD, DFT, Systems, Analog, FW, application) to achieve verification goals; perform final SoC DV signoff based on regressions, coverage metrics, and DV to spec traceability adhering to ISO26262 guidelines
Seniority
Senior, hands-on IC with leadership responsibilities
