Hardware Engineer
Core
Design and verify custom ASICs for low-latency trading infrastructure, collaborating with software and research teams to solve complex hardware challenges.
Role type
Senior IC ASIC Hardware Engineer
Builds
Proprietary hardware solutions for high-performance trading systems
Domain
Financial technology / High-frequency trading / ASIC design
Deliverable
production ML models | product features | infrastructure
Required skills
RTL design (SystemVerilog), digital design fundamentals, C++, verification strategy, multi-clock-domain design, Ethernet protocols, scripting (Python/Bash)
Preferred skills
FPGA development, PMA technologies, high-performance networking, low-latency system design, trading infrastructure experience
Technologies
SystemVerilog, C++, Python, Bash, Ethernet
Responsibilities
Design and implement RTL for next-generation ASIC platforms, develop unit tests and verification environments, debug design and integration issues, develop scripts and tooling to improve engineering workflows
Seniority
Senior, hands-on IC
