ASIC Engineer (hybrid)
Core
Define, design, and verify ASIC and ASIC subsystems for deployment in Cisco platforms, focusing on power, performance, and area goals.
Role type
Senior IC ASIC Engineer (analog/mixed-signal and digital)
Builds
High-volume, high-quality ASIC subsystems and blocks for Cisco networking infrastructure
Domain
Semiconductor design / Networking hardware
Deliverable
production ML models | product features
Required skills
ASIC design, RTL development, block-level flow, design verification, test plan execution, physical design, signal integrity, power integrity, RDL integration
Preferred skills
Experience with analog/mixed-signal products, mentorship of RDL block owners
Technologies
RTL, RDL, test benches, verification environments
Responsibilities
Collaborate on high-performance ASIC definition and design; oversee and debug complex code; build design from block spec to tapeout; lead design verification activities; drive signal and power integrity for ASIC integration; analyze and validate subsystems
Seniority
Senior, hands-on IC