ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years
Core
Design and verify high-speed analog/mixed-signal circuits for silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda optical transceivers.
Role type
Senior IC analog/mixed-signal design engineer (silicon photonics)
Builds
High-speed datapath and control circuits for pluggable and co-packaged optics (NPO/CPO)
Domain
Data center networking, silicon photonics, high-speed optical transceivers
Deliverable
production ML models | product features
Required skills
high-speed optical transceiver design, device physics, circuit operations, Python/C scripting, Cadence Virtuoso/Spectre/Caliber
Preferred skills
silicon photonics driver ICs, SerDes 112Gbps/224Gbps PAM4, clock and data recovery systems, Verilog-A modeling, lab instrumentation
Technologies
Cadence Virtuoso, Spectre, Caliber, Python, C, Verilog-A
Responsibilities
Author mixed-signal datapath designs including modulator drivers, serializers, PLLs, TIAs; drive full-chip electrical specifications and verification test plans; debug silicon and system-level issues during bring-up and lab validation
Seniority
Senior, hands-on IC
