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Senior ASIC Engineer - Post Silicon Validation

San Jose, California, US💼 Full-time💰 $167,700–$167,700🗓 2026-09-10 → 2026-09-25

Core

Post-silicon validation engineer responsible for bringing up ASICs, executing functional and performance testing, and resolving hardware issues to ensure silicon readiness.

Role type

Senior IC ASIC post-silicon validation engineer

Builds

Cisco core Switching, Routing, and Wireless hardware platforms

Domain

Semiconductor hardware validation and silicon bring-up

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

ASIC bring-up and debug, functional and performance testing, lab instrumentation (oscilloscopes, analyzers, traffic generators), firmware and bootloader debugging, C/Python scripting, standard peripheral interfaces (I2C, SPI, JTAG), protocols (PCIe, Ethernet)

Preferred skills

memory subsystems (HBM, DDR), electrical and thermal performance characterization, System Verilog/UVM, emulation-based verification

Technologies

C, Python, System Verilog, UVM, PCIe, Ethernet, I2C, SPI, JTAG, HBM, DDR

Responsibilities

Planning and setting up Silicon Bring-up infrastructure (system boot, initialization, Power-On), executing functional and performance testing targeting IP/Subsystem/full-chip, developing validation automation and test suites, root-cause analysis of functional and electrical issues, applying lab instrumentation for characterization, providing feedback on test escapes and yield issues

Seniority

Senior, hands-on IC

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