Principal ASIC Engineer (Reliability & Hardware Validation) Hybrid
Core
Lead reliability and hardware design validation for next-generation semiconductor and networking products, bridging advanced semiconductor testing with high-speed board design.
Role type
Principal ASIC Engineer (Reliability & Hardware Validation)
Builds
Next-generation semiconductor and networking products for hyperscale environments
Domain
Semiconductor reliability and high-speed hardware design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Semiconductor reliability testing, high-speed hardware design, HTOL/Burn-In testing, JEDEC/AEC/Telcordia standards, board bring-up and debug, failure analysis, multi-functional team leadership
Preferred skills
PhD in Electrical/Computer Engineering, advanced node experience (2nm/3nm, CoWoS, SoIC, EMIB), >100Gbps system design, SerDes architecture, Python/Perl/TCL/Verilog scripting, JMP/Reliasoft/Minitab statistical analysis, FMEA processes
Technologies
Cadence Allegro, HTOL, Burn-In, HAST, TC, HTS, ESD, LU, SER, PCIe Gen5/6, 800G Ethernet, SerDes (NRZ/PAM4)
Responsibilities
Define and execute product/process qualification plans for wafer/package level solutions; Drive robust HTOL, Burn-In, and stress testing; Lead hardware design, schematic generation, and design validation; Drive failure analysis activities and generate qualification reports; Partner with eCAD, FPGA, Power, Mechanical, and Manufacturing teams; Provide technical documentation and support for customer quality requirements
Seniority
Principal, hands-on IC with strategy & mentorship
