ASIC Engineering Technical Leader
Core
Define, design, and verify high-performance ASICs and subsystems for Cisco networking platforms (routers, switches, optical), focusing on power, performance, and area goals.
Role type
Senior IC ASIC Engineering Technical Leader (Analog/Mixed-Signal & Physical Design)
Builds
Custom silicon chips and subsystems for high-volume networking infrastructure
Domain
Semiconductor hardware design (ASIC) / Networking infrastructure
Deliverable
production ML models | product features
Required skills
ASIC architecture and design, analog/mixed-signal circuit design, physical design, system-level verification, reusable code methodology, project management, vendor interface management
Preferred skills
PMP certification, innovative verification strategy development
Technologies
Test benches, design rule sets, packaging technologies
Responsibilities
Oversee definition, architecture, and design of high-performance ASICs; architect and design analog/mixed-signal circuits; direct mixed-signal teams to define requirements; oversee all physical design functions; create guidelines and standards for design and implementation; drive design solutions across the business; consult on complex architecture and design decisions.
Seniority
Senior, hands-on IC with leadership responsibilities
