ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years
Core
Design and verify high-speed analog/mixed-signal circuits for silicon photonics driver integrated circuits supporting 100G/200G/400G per Lambda optical transceivers.
Role type
Senior IC analog/mixed-signal design engineer (silicon photonics)
Builds
High-speed optical transceiver driver ICs (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) for Cisco data center networking platforms
Domain
Data center networking, silicon photonics, high-speed optical communications
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
high-speed AMS circuit design, device physics, circuit operations, Python/C scripting, Cadence Virtuoso, Spectre, Caliber
Preferred skills
silicon photonics driver IC design, direct-detect optical module architectures, SerDes protocols (PAM4), Verilog-A modeling, lab instrumentation (BERTs, real-time scopes)
Technologies
Cadence Virtuoso, Spectre, Caliber, Python, C, Verilog-A
Responsibilities
Drive full-chip electrical specifications and circuit design from concept to production; author mixed-signal datapath designs; debug silicon and system-level issues during bring-up and validation; collaborate on verification and testability strategies
Seniority
Senior, hands-on IC