Analog/mixed-signal IC Design Developer - Acacia - (Hybrid)
Core
Architect, design, layout, measure, and productize ultra-deep sub-micron-based CMOS analog designs for high-speed optical communications products.
Role type
Senior IC Design Engineer (Analog/Mixed-Signal)
Builds
High-speed transceiver ASICs for 100G, 400G, 800G, and 1.6T+ fiber optic transmission
Domain
Telecommunications / Optical Communications / Semiconductor Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
High-speed serial link design, Phase Locked Loops (PLL), Opamps and Programmable Gain Amplifiers, Equalization techniques, High Performance Output Drivers, Clock transmission/propagation, Design simulation and measurement
Preferred skills
FinFET and GAA technologies, High-frequency layout and floorplaning, Design for manufacturability (PVT, electromigration, IR drop), Laboratory validation and test setup construction, Cadence Virtuoso and Spectre, Calibre, EMX, Matlab
Technologies
Cadence Virtuoso, Spectre, Calibre, EMX, Matlab
Responsibilities
Lead efforts for a large block on a complex chip, mentor team members, participate in peer review of complex IC designs, collaborate with packaging and hardware design teams to ensure signal and power integrity
Seniority
Senior, hands-on IC