CareerPlan

Design Verification Engineer

Beaverton, United States of AmericaFull-time2026-10-28 → 2026-11-02

Core

Ensuring the quality of System on Chip (SOC) designs by developing test methodologies, test benches, and coverage plans.

Role type

Design Verification Intern

Builds

Functional and performance-verified SOC chips for Apple products

Domain

Semiconductor hardware design and verification

Required skills

Verilog, C/C++/assembly, scripting languages (Perl/Python/Ruby), SOC/CPU architecture knowledge, test bench development, coverage planning

Preferred skills

Object-oriented programming concepts, industry standard interface knowledge, low-level system programming

Technologies

Verilog, Verilog simulator, C, C++, assembly, Perl, Python, Ruby

Responsibilities

Review specifications and define attributes, tests, and coverage plans; Collaborate with design and micro-architecture teams to understand functional goals; Develop test methodologies and test benches; Manage deliverables to align with project goals

Seniority

Intern