RFIC - PLL Design Engineer
Core
Design and develop analog and digital PLL building blocks and top levels for high-performance wireless SoCs, driving them to mass production.
Role type
Senior IC RFIC PLL Design Engineer
Builds
Wireless connectivity solutions for Apple products
Domain
Semiconductor / RFIC / Wireless Silicon
Required skills
Analog and digital PLL design, LOGEN design, VCO/DCO/MMD/PFD/Filter/TDC design, Mixed-signal verification (SystemVerilog, AMS), RF circuit design concepts, Silicon characterization and debug, Transistor-level design
Preferred skills
Noise/spur cancellation techniques, RF transceiver architecture trade-offs, Timing analysis tools (Nanotime, Primetime), Deep sub-micron RFCMOS technology, Cadence Virtuoso/Spectre RF/Matlab/EM simulation
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