Graphics Emulation Test Bench and Infrastructure Architect
Core
Architecting and building emulation and simulation test benches to validate complex GPU microarchitectures and ensure hardware/software platform quality for mobile and high-performance devices.
Role type
Senior IC graphics emulation test bench and infrastructure architect
Builds
Reusable emulation models, automated verification flows, and test environments for pre-silicon GPU validation
Domain
Semiconductor hardware design, GPU microarchitecture, and verification infrastructure
Required skills
Complex bus protocols (PCIe, AXI), CPU/GPU architecture and microarchitecture, DPI/transactors, behavioral and synthesizable RTL (SystemVerilog/Verilog), C/C++/Perl/Ruby/Python programming, test bench profiling and optimization
Preferred skills
Technical leadership in emulation/simulation, hardware debugging via waveforms, interfacing emulation hardware with virtual systems and silicon validation, 3D graphics pipeline knowledge (OGL/OCL)
Technologies
SystemVerilog, Verilog, PCIe, AXI, C, C++, Perl, Ruby, Python
Responsibilities
Architecting emulation and simulation test benches for functional, performance, and power analysis teams; developing support plans with pre-silicon validation teams; exploring new technologies for simulation and hardware acceleration; building simulation/emulation models and debugging build issues; running tests and capturing waveforms to debug issues; creating automated verification flows; reporting status and mentoring engineers
Seniority
Senior, hands-on IC with technical leadership responsibilities
