Design Verification Engineer
Core
Verify functionality and performance of Apple's premier System-on-Chips (SOCs) and IP subsystems by developing test plans, tests, coverage plans, and next-generation verification methodologies.
Role type
Design Verification Engineer (Hardware/SoC)
Builds
Verified SOC designs and IP blocks for Apple hardware products
Domain
Semiconductor hardware design and verification
Required skills
Verilog, SystemVerilog, digital simulation and debug, Python, Perl, C/C++, assembly, computer architecture, digital design fundamentals
Preferred skills
None explicitly stated as preferred beyond the minimum qualifications
Technologies
Verilog, SystemVerilog, Python, Perl, C, C++, assembly
Responsibilities
Review design and architecture specifications, develop test plans and coverage plans, run and triage regressions, track bugs, analyze coverage to achieve top results, collaborate with design, architecture, and software teams to understand use cases and corner conditions
Seniority
Entry-level (BS + 0 years experience)
