Wireless SoC Design Engineer
Core
Designing CPU-based subsystems for high performance, low power wireless System-on-Chips (SoCs) to meet power, performance, and area goals for Apple devices.
Role type
Senior IC VLSI/RTL design engineer
Builds
Wireless SoCs for Apple devices
Domain
Consumer electronics / Wireless silicon / VLSI
Required skills
RTL development in SystemVerilog, SoC architecture, digital design, IP integration, static timing analysis, power optimization, area optimization
Preferred skills
Micro-architecture specification, EDA tools, AXI/AHB bus fabric, processor sub-systems, UPF and low-power design techniques
Technologies
SystemVerilog, Verilog, LINT, CDC, RDC, AXI, AHB, UPF
Responsibilities
Writing micro-architecture and design specifications; Coding design in SystemVerilog; Integrating IP blocks and optimizing memories/hard macros; Supporting verification efforts; Analyzing and optimizing area, timing, and power; Collaborating with multi-disciplinary groups to ensure on-time delivery.
Seniority
Senior, hands-on IC
