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Wireless SoC Design Engineer

San Francisco Bay Area, United States of America💼 Full-time🗓 2025-10-29 → 2026-09-28

Core

Design CPU-based subsystems for high performance, low power wireless System-on-Chips (SoCs) focusing on energy efficiency and integration of hardware IPs.

Role type

Senior IC VLSI/RTL design engineer

Builds

Wireless SoCs for Apple devices

Domain

Consumer electronics / Wireless silicon / VLSI

Required skills

RTL design in SystemVerilog, SoC architecture, ASIC design flow, IP integration, static timing/power analysis, micro-architecture specification

Preferred skills

UPF and low-power design techniques, AXI/AHB bus fabric, processor sub-systems, EDA tools, MSEE degree

Technologies

SystemVerilog, Verilog, LINT, CDC, RDC, AXI, AHB, EDA tools

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