Principal AI Silicon Architect
Core
Define end-to-end power architecture for high-power AI accelerator SoCs, managing tradeoffs across silicon, package, board, and system levels to maximize performance per watt.
Role type
Principal AI Silicon Architect (Power Architecture)
Builds
High-power AI accelerator SoCs and associated power delivery systems
Domain
Semiconductor / AI Hardware / Power Architecture
Deliverable
production ML models
Required skills
SoC power architecture, power delivery (PDN), power management (DVFS, gating), thermal management, workload analysis, multi-die/chiplet design, system-level tradeoffs
Preferred skills
Experience with AI accelerators, GPUs, HPC processors, server CPUs, voltage/frequency scaling, energy-efficiency optimization
Technologies
AI accelerators, GPUs, HPC processors, server CPUs, multi-die architectures, chiplet architectures
Responsibilities
Define SoC and package-level power-management architecture; manage workload power excursions and peak/sustained power constraints; partner with performance teams to maximize performance per watt; drive architectural tradeoffs across performance, power, thermal, and cost; translate requirements into power budgets and design targets; define SoC-to-system interfaces for power and thermal management; provide technical leadership from architecture through silicon bring-up and optimization.
Seniority
Principal, hands-on IC with strategic influence
