Senior Silicon Design Verification Engineer
Core
Develop C/C++ test content, low-level drivers, and custom firmware for subsystem and SoC verification; own FPGA prototyping platforms and drive post-silicon bring-up and validation.
Role type
Senior Silicon Design Verification Engineer (SoC/FPGA/Post-Silicon)
Builds
Custom firmware-style tests, FPGA board images/bit files, protocol interface RTL, and stable prototyping platforms for firmware teams.
Domain
Semiconductor hardware verification, embedded systems, FPGA prototyping
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
C, C++, SystemVerilog, Python, JTAG debugging, logic analyzer usage, oscilloscope usage, multimeter usage, low-level embedded software (assembly/linker scripts), AMBA protocols (AXI/AHB/APB), JTAG, SPI, I2C/I3C, USB, silicon architecture knowledge
Preferred skills
None explicitly stated as preferred (all listed as experience requirements)
Technologies
HAPS, Xilinx, JTAG debuggers, logic analyzers, oscilloscopes, multimeters, Makefile-based build flows
Responsibilities
Develop C/C++ test content and low-level drivers for subsystem and SoC levels; extend compile/build flows for custom firmware tests; own FPGA prototyping platforms (create board images, bit files, custom RTL); release stable platforms to firmware teams; develop Python tooling for FPGA interfacing; debug FPGA and post-silicon issues (JTAG, UART, boot failures); drive post-silicon bring-up and validation in lab; root-cause failing tests and deliver fixes.
Seniority
Senior, hands-on IC
