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Senior Design Engineer-CPU

Giv'atayim, IsraelFull-time2026-09-16 → 2026-10-15

Core

Senior technical lead developing high-performance RISC-V CPU ASICs from micro-architecture definition through tape-out and product bring-up.

Role type

Senior IC CPU design engineer (RISC-V)

Builds

High-performance RISC-V CPU chips for HPC and AI

Domain

Semiconductor / CPU Design

Required skills

ASIC front-end design, VLSI architecture, design for timing and power, front-end design flows (CDC, LINT, Synthesis), high-frequency CPU design

Preferred skills

RISC-V architecture, micro-architecture development

Technologies

RISC-V, ASIC, VLSI, CDC, LINT, Synthesis, FPGA

Responsibilities

Define and drive design of advanced CPU blocks from micro-architecture phase to tape-out, Work closely with SW, Architecture, verification, BE, FPGA, and postSi teams, Devise execution indicators and monitor/report progress for prioritization and decision making

Seniority

Senior, hands-on IC