CareerPlan

Senior Ingenieur Wafertest EWS Testchips (w/m/div)

Dresden, SACHSENFull-time2026-08-19 → 2026-10-27

Core

Providing test and characterization solutions for SRAM and other test chips to enable rapid technology transfer and optimize reliability, quality, and yield.

Role type

Senior IC test engineer (wafer test)

Builds

Wafer test programs and test structures for test chips and test structures

Domain

Semiconductor manufacturing (wafer test)

Required skills

Wafer test, PCM test, semiconductor device characterization, analog and digital circuit design, ASIC and MEMS technologies, test programming, statistical analysis methods, Python, C/C++

Preferred skills

Scripting languages

Responsibilities

Develop or transfer wafer test programs from test development to the Dresden Fab, prepare for lab use or production handover, create or modify test programs for technology and reliability characterization, electrically characterize test failures based on data analysis, determine suitable test conditions for failure localization, drive optimization of technology, test programs, or design, serve as the contact for series production on reliability, quality, and yield optimization projects.

Seniority

Senior, hands-on IC