芯片系统专家
Core
Lead end-to-end system design for Camera, xPU, Display, and Micro-core subsystems, optimizing hardware-software-chip synergy for image quality, performance, and power efficiency.
Role type
Senior IC chip system architect (camera, xPU, display, micro-core)
Builds
High-performance chip solutions for terminal products (smartphones, wearables, etc.)
Domain
Consumer electronics / Semiconductor / Mobile SoC
Deliverable
production ML models
Required skills
Camera subsystem design (ISP, imaging pipeline), xPU scheduling (CPU/GPU/NPU), Display subsystem design (DDIC, color management), Micro-core design (MCU, power management), System-level architecture, Hardware-software co-design, High-speed interface design, Packaging design, Performance/power trade-off analysis
Preferred skills
HarmonyOS architecture knowledge, Cross-module integration, Industry trend tracking
Technologies
ISP, NPU, GPU, CPU, DDIC, MCU, HarmonyOS, High-speed interfaces
Responsibilities
Lead Camera subsystem hardware-software-chip co-design; Manage xPU system-level scheduling and AI inference optimization; Design Display subsystem end-to-end; Architect Micro-core systems for low-power scenarios; Define system architecture standards and drive cross-chip/hardware/driver integration; Define custom chip requirements including packaging and high-speed interfaces.
