ASIC Engineer Intern
Core
Intern role focused on hands-on experience in cutting-edge semiconductor development within ASIC Design, Verification, or Tools & Methodologies.
Role type
ASIC Engineer Intern
Builds
ASIC architectures, RTL designs, verification testbenches, and EDA automation tools
Domain
Semiconductor / Hardware Design
Required skills
SystemVerilog, UVM, Python, C++, Digital Logic Design, Computer Architecture, VLSI Design, RTL design, synthesis, linting, testbench development, regression analysis, EDA tools, Design-for-Test (DFT)
Preferred skills
Networking protocols, machine learning, advanced computer architecture
Technologies
SystemVerilog, UVM, Python, C++, EDA tools
Responsibilities
Participate in ASIC architecture investigation and performance analysis; Create functional and micro-architectural specifications; Assist in RTL design and support synthesis/linting; Develop and maintain testbenches and write test plans; Contribute to automation for ASIC development processes; Collaborate with team members to troubleshoot technical issues
Seniority
Intern
