AI Chip Architect
Core
Define compute architecture for next-generation GenAI accelerators, including ISA, connectivity, memories, and control, translating AI workloads into hardware solutions.
Role type
Senior IC AI Chip Architect
Builds
Vertically integrated full-stack silicon and software solutions for training and running large-scale GenAI models
Domain
Semiconductor hardware design / Generative AI
Deliverable
production ML models
Required skills
Computer architecture, AI accelerator design, microarchitecture fundamentals, performance analysis, workload-to-hardware translation, numeric formats and quantization, kernel-level optimization
Preferred skills
Large-scale transformer model optimization, power/area/performance tradeoff analysis
Technologies
GPUs, TPUs, vector processors, SIMD, VLIW
Responsibilities
Define AI compute subsystem architecture, derive requirements from AI use cases, conduct performance analysis, collaborate with Research/SW/HW teams, manage PPA tradeoffs, support silicon bring-up and debug
Seniority
Senior, hands-on IC