Senior ASIC Design Engineer – Processor Subsystem
Core
Design, configuration, integration, and verification planning of Arm processor IP and associated subsystem components for satellite IoT connectivity ASICs.
Role type
Senior ASIC Design Engineer (Processor Subsystem)
Builds
Satellite IoT connectivity ASICs
Domain
Space communications / IoT / Semiconductor
Deliverable
production ML models | product features | infrastructure
Required skills
Arm processor IP, RTL design, functional verification, processor subsystem architecture, complex IP integration, design validation
Preferred skills
self-starter mindset, ownership of complex technical challenges, ability to work with minimal oversight
Technologies
Arm processor IP, RTL
Responsibilities
Configuration of Arm processor IP, integration of complex IP into cohesive designs, verification planning for subsystem components
Seniority
Senior, hands-on IC
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