Principal Modem PHY IP Design Engineer - Terawave
Core
Design and develop advanced modem physical layer (PHY) IP for next-generation high-performance wireless ASIC solutions supporting the Terawave satellite communications network.
Role type
Principal Modem PHY IP Design Engineer
Builds
High-throughput wireless ASICs and prototyping platforms for satellite communications
Domain
Space communications / Wireless / Digital Communications
Deliverable
production ML models | product features
Required skills
Digital communications theory, Modem PHY design, DSP, ASIC/FPGA baseband development, OFDM/single-carrier systems, Synchronization algorithms, Channel estimation and equalization, Adaptive modulation and coding, FEC (LDPC, Polar, Turbo, BCH), Fixed-point analysis, MIMO/beamforming, Algorithm-to-hardware translation
Preferred skills
mmWave/sub-THz/Terahertz systems, Satellite/space communications, 5G/6G systems, High-throughput wireless backhaul/mesh, RTL design and verification, FPGA prototyping, RF/mixed-signal impairments knowledge
Technologies
MATLAB, Python, C/C++, FPGA, ASIC
Responsibilities
Design and develop modem PHY IP for Terawave ASIC and prototyping platforms, Contribute to PHY algorithm development and hardware architecture (modulation/demodulation, synchronization, channel estimation, equalization, FEC, MIMO), Translate system requirements into implementation-ready PHY block specifications, Develop floating-point, fixed-point, and bit-accurate models, Perform performance analysis and trade studies, Work with architecture and RTL teams to partition algorithms, Support interface definition and subsystem integration, Collaborate with verification teams to define test strategies, Analyze simulation, emulation, FPGA, lab, and silicon data to debug design issues, Support bring-up and validation of modem PHY features in FPGA prototypes and silicon, Document design assumptions and performance results
Seniority
Principal, hands-on IC with strategy & mentorship
