IC Implementation, Sr Principal AE
Core
Senior technical leader driving complex pre-sales and post-sales engagements for Cadence Digital IC products at advanced nodes (3nm and below), solving toughest design challenges and ensuring customer success.
Role type
Senior Principal Application Engineer (Digital IC Implementation & Signoff)
Builds
Custom EDA solutions and design flows for advanced-node digital chips
Domain
Semiconductor EDA / Digital IC Design
Required skills
Advanced-node physical implementation (7nm and below), Digital synthesis, Place-and-route, Static timing analysis, Power optimization, Scripting (TCL, PERL, Python), Debugging complex design issues, Tapeout experience
Preferred skills
Agentic-AI expertise, Design convergence with timing closure, Floor planning, CTS
Technologies
Cadence EDA tools, TCL, PERL, Python
Responsibilities
Lead technical strategy for critical customer design projects, Partner with sales to grow business, Serve as primary consultant for synthesis & implementation, Develop custom automation solutions, Mentor junior engineers
Seniority
Senior Principal, hands-on IC with strategic influence