Principal Design Engineer
Core
Design and integration of Intellectual Property (IP) in System-on-Chip (SoC) based on high-level architectural specifications from customers.
Role type
Principal Design Engineer (Digital SoC/IP)
Builds
Custom IP blocks and SoC designs for customer applications
Domain
Semiconductor / Digital SoC Design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Digital design fundamentals, Verilog, SystemVerilog, Lint/CDC flows, Synthesis constraints, Static Timing Analysis (STA), Python/Perl/Tcl scripting, AMBA protocols, High-speed IP (PCIe, Ethernet, DDR)
Preferred skills
Synthesis tools, Simulation tools (Xcelium, Verisium), ARM IPs
Responsibilities
Design and integration of IPs in SoC, Perform Lint/CDC checks, Create synthesis constraints for PPA optimization, Create Microarchitectural Specification documents, Support verification team for test plan and coverage analysis, Support physical design team, Implement automation solutions
Seniority
Senior, hands-on IC
