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Intern Digital Implementation

VELIZY (Paris)💼 Internship🗓 2026-09-18 → 2026-09-25

Core

Execute a complete RTL-to-GDSII digital implementation flow using Cadence's AI-powered InnoStack super-agent to deliver a fabrication-ready database.

Role type

Junior IC digital implementation intern (RTL-to-GDSII)

Builds

Fabrication-ready GDSII databases and RTL-to-GDSII implementation flows

Domain

Semiconductor design / Electronic Design Automation (EDA)

Deliverable

production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work

Required skills

RTL design, Linux, Python scripting, Tcl scripting, digital IC design fundamentals

Preferred skills

ASIC/digital implementation flow exposure, EDA tools experience, physical design concepts, prompt engineering

Technologies

InnoStack, Cadence tools, Python, Tcl

Responsibilities

Execute RTL-to-GDSII flow guided by InnoStack, generate implementation scripts and methodologies, run and optimize implementation stages, diagnose and resolve technical issues, validate AI recommendations, document best practices and AI limitations

Seniority

Intern

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