Principal Product Engineer - Virtual Protocols
Core
Expert in System Level Software Driven Verification using advanced protocol engines to enable shift-left pre-silicon verification and validation for advanced SoC designs.
Role type
Principal Product Engineer (System Verification & Emulation)
Builds
Transaction Based Acceleration and Virtual Emulation-based System Verification products
Domain
Semiconductor / SoC Design / Hardware Emulation
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
PCIe, CXL, Ethernet, USB, AMBA protocol expertise; UVM SystemVerilog / Virtual Prototyping SystemC / Portable Stimulus; C/C++ development; Linux Kernel/Driver Development; SoC design and verification; Hardware emulation; HDL (SystemVerilog, VHDL); Scripting (shell, python, perl); Compiler tools (make, gcc/g++)
Preferred skills
SoC design and verification experience; Hardware emulation experience
Technologies
Palladium, Protium, VirtualBridge, SystemVerilog, C++, Linux, PCIe, CXL, Ethernet, USB, AMBA, UVM, SystemC, Portable Stimulus
Responsibilities
Partner with R&D to define product features and capture customer feedback; Demonstrate product performance, debugging, and functionality to field and marketing teams; Guide customers on best use of Cadence technologies; Develop and deliver feature-based training for new products; Deploy new protocol products to innovative customers; Support customers utilizing Accelerated Verification IPs and advanced APIs
Seniority
Principal, hands-on IC with strategy & mentorship
