Analog Design Engineering Intern (Power Management)
Core
Intern developing low-power analog and power-management IP for highly integrated mixed-signal ICs, focusing on DC/DC converter architectures and analog building blocks.
Role type
Analog Design Intern (Power Management)
Builds
Low-power analog and power-management IP for mixed-signal ICs
Domain
Semiconductor / Power Electronics
Required skills
Analog electronics, circuit theory, CMOS devices, transistor-level design, feedback systems, frequency response, stability analysis, power electronics, switching circuits, circuit simulation
Preferred skills
DC/DC converter architectures (buck, boost, buck-boost), PWM/PFM operation, loop stability, transient response, transistor-level IC design tools (Cadence Virtuoso, Spectre), power-converter modelling (SIMPLIS, MATLAB, Simulink), power-management building blocks (LDOs, references, comparators, oscillators, gate drivers), low-power design techniques, laboratory equipment usage, Python/MATLAB scripting
Technologies
Cadence Virtuoso, Spectre, SIMPLIS, MATLAB, Simulink
Responsibilities
Conduct circuit architecture research and feasibility studies for low-power power-management functions; Contribute to the architecture, design, simulation and verification of DC/DC converter IP; Design and analyse analog sub-circuits for power converters; Develop simulation testbenches and contribute to design verification; Analyse converter performance trade-offs; Explore converter operating modes and control techniques; Contribute to behavioural and system-level modelling; Work with layout engineers on physical implementation; Participate in technical and design reviews; Support top-level integration and verification; Contribute to laboratory evaluation of silicon performance
Seniority
Intern
