Staff Engineer, Post-Silicon Debug & Validation Engineer
Core
Staff GPU Post-Silicon Debug and Validation Engineer responsible for bring-up, debug, and validation of next-generation GPU and system-level IP across silicon and emulation platforms.
Role type
Staff IC GPU Post-Silicon Debug & Validation Engineer
Builds
High-performance GPU technologies for mobile and automotive SoCs
Domain
Semiconductor / GPU Architecture / Silicon Validation
Deliverable
production ML models | product features
Required skills
GPU silicon debug, automated SOC-level system test generation, board-level hardware/software bring-up, functional and parametric analysis of SOC/IP, root cause analysis, AI/ML tools for debug automation, software tool/script development, SOC emulation modification and analysis, IP-level functional validation test plans, GPU architectural knowledge, GPU APIs (OpenGL, OpenGL ES, Vulkan), C/C++/Python/Shell scripting, Linux/Android kernel programming, Verilog/UVM
Preferred skills
Logic Analyzers/Scopes usage, Lauterbach debugger, performance/power measurement, scanchain/array dump techniques, waveform analysis/emulator signal extraction, IPXACT design documents/parser development, BIOS/firmware programming
Technologies
AI/ML tools, Logic Analyzers, Scopes, Lauterbach, Linux, Android, Verilog, UVM, OpenGL, OpenGL ES, Vulkan, C, C++, Python, Shell
Responsibilities
Support GPU silicon debug and design-for-debug architecture; Assist with automated SOC-level system test generation; Participate in board-level hardware and software bring-up; Perform functional and parametric analysis of SOC and IP; Debug and root-cause improper or inconsistent operation; Develop software tools/scripts leveraging AI/ML to accelerate analysis; Contribute to IP-level functional validation test plans; Support SOC emulation modification and analysis; Provide debug input for feature improvements
Seniority
Staff, hands-on IC with strategic collaboration
