Device Engineer
Core
Lead end-to-end yield performance and optimization across wafer sort, parametric, and final testing for advanced semiconductor manufacturing.
Role type
Staff-level Yield Analysis & Improvement Engineer
Builds
Automated analytics pipelines and sophisticated yield models for semiconductor fabrication
Domain
Semiconductor manufacturing (FinFET/GAA architectures)
Deliverable
production ML models | dashboards & analysis
Required skills
Semiconductor device physics, wafer fabrication processes (Lithography, Etch, CMP, PVD/CVD), statistical analysis, machine learning, Python, SQL, root cause investigation, cross-functional collaboration
Preferred skills
Experience with FinFET or Gate-All-Around (GAA) architectures, 5+ years in semiconductor yield or process integration
Technologies
Python, JMP, SQL, Spotifre
Responsibilities
Own end-to-end yield performance across test stages; perform data mining to identify yield limiters; correlate electrical failures with defect data; lead root cause investigations for yield excursions; define yield roadmaps and KPIs; mentor junior engineers
Seniority
Staff, strategic leadership & hands-on technical execution
